The M62 – 16-Bit IDE/CF interface card to allow the reading/writing of an IDE drive or Compact Flash device. This allows for a mass storage solution for the M62 system.
Initially I created a prototype that would only read/write the lower 8-bits of the IDE’s data bus, this worked perfectly fine except I would only be able to use half of the devices capacity. I then expanded the design by adding an 8-bit latch and providing some logic that would load it with data from the IDE interface when reading, and then load it’s data into the IDE’s interface when writing. The 8-bit latch can be read from or written at it’s own address allowing the handling of the high-byte. If there is a desire to use only the bottom 8-bits then this 8-bit latch can be ignored or omitted from the design, this would allow faster reading from the device but at the cost of half the capacity and incompatibility with drives formatted with 16-bit interfaces. (note: some IDE drives and CF cards can be put into 8-bit mode using the features register allowing only the lower 8-bits to be used for the full capacity of the device, I have not experimented with this yet)
The 16-Bit prototype has 4 more IC’s that the 8-bit one, this is for the latch chip and it’s associated logic. I put a DIY right-angle adaptor on the IDE socket so I can mount the SD adaptor as close to the board as possible keeping the profile as thin as possible. I also put a power socket on it to allow me to power it from my ATX Bench PSU (I modified an old ATX PSU to allow me to use it without a PC, I put banana sockets on it to allow me to access all the voltages it provides, but I left the drive power cables on it for this type of thing). The CF adaptor requires 5V via the floppy drive type power connector so I added a cable to power it from the IDE card, this allows me to power the CF card when I’m using the USB socket on the Z80-SBC card to power it. I have to use the external PSU if I’m working with hard disks on the interface as it requires a little bit more current than the USB likes to give.
This is how it looks when it’s all together 🙂
The 3×8 header allows me to select the address for both the IDE interface and the 8-bit latch, this also physically prevents the selection of the same address of both sections of the card, however this doesn’t prevent conflict with other cards using these addresses which is why my prototype is set to $00 for IDE and $10 for the high-byte latch, $08 is used by my UART interface.
There is a further modification to be made to this circuit as the high-byte latch currently occupies 8 address locations (base -> base+7) so I will further decode it to have one address for selecting the latch, and one for resetting the IDE interface.
Version 1.2.1 of the Schematic can be found here
The software is currently in development and a driver file will be created which will provide functions for the BIOS.
Eventually there will be functions to read and write sectors of the hard drive using a 512 byte buffer in memory.
So far, this is the structure of the buffer I am using to do my tests. The software will put the LBA address in the first 4 bytes and call a function for them to be transferred into the appropriate IDE/CF registers.
As of November 11 2018 reading and writing of a 512 byte sector is working successfully.
I will have IDE test code ready to share once I have a version of the BIOS code made available (The 16-Bit IDE test code is of little value without the BIOS) hopefully in the next couple of days.