The newest revision of the Z80-SBC is currently having it’s prototype PCB fabricated, unfortunately due to the Coronovirus situation in China the production has been suspended at 83% 🙁 I will keep you posted on this status.
Details of this revision:
- Backwards compatible with Rev 1 and 2.
- Almost everything is surface mount, this reduces the size.
- We now have a Compact Flash socket included on the board.
- There is an optional isolated USB-UART interface based on the CH340G (I did notice I made a mistake in the silkscreen)
- We have 512KB each of ROM and RAM (Paged through Bank 0, more on that later)
- You can select an external clock for the Z80, the 4MHz remains connected to the bus and the on-board UART
Sections in more detail
This revision now has a Compact Flash socket, it is accessed in 8-bit IDE mode. There is a jumper selection on the board to allow us to select the base address of the CF from between $08 and $38 in $08 increments.
I have been working on FAT16 support for CF for the BIOS and M62-OS, so far I can read files in the root directory/folder, see here for more information on that.
The ROM and RAM structure is pretty much the same as the other revisions on reset.
Bank 0 is mapped to the first page of ROM, and Bank 1 to the first page of RAM (This is a fixed mapping). Each page is 16K in size.
With this revision, we have a write-only memory configuration register at I/O port $00 that assigns the mapping of Bank 0.
Bits 1-5 configure the A14-A18 lines, which basically select which 16K page of the ROM/RAM we are using.
Note: Bank 1 is always mapped to RAM page 0 regardless of Bank 0 configuration, this is because the stack is stored at the top of bank 1 and removing access to it would cause the system to crash.
Upon reset, this register will default to $00.
More information to come soon…